In the art, when an analog-to-digital converter (ADC) is used to digitize a signal, distortion is inevitably introduced. The degree of distortion depends on the number of bits utilized in the ADC, but it further depends on how well the dynamic range of the ADC is used. On the one hand, the analog signal supplied to the ADC for conversion into the digital domain should not be too weak since the dynamic range of the ADC then is ineffectively used. On the other hand, the signal input to the ADC should not be too strong, as the ADC then frequently will saturate and produce clipping noise. To ensure that the input signal to the ADC has a suitable strength, automatic gain control (AGC) is employed, such that an appropriate trade-off between clipping and effective use of dynamic range is attained.
Thus, the AGC is controlling the strength of the signal input to the ADC such that a suitable trade-off between quantization noise and clipping distortion is obtained. This is to ensure that the bits of the ADC are effectively used. The effect of quantization noise is easily determined, whereas the effect of occasional clipping is harder to determine, and as a consequence, it is quite common to let the AGC control the signal amplitude such that the probability of clipping practically is zero. This design is justified by the fact that poor (i.e. slow and/or inexact) control resulting in a too strong signal supplied to the ADC is typically much worse than in a case where the signal becomes too weak, i.e. an increase in quantization noise is less of a problem than clipping.
This problem is particularly evident in case of adjacent channel interference (ACI). One situation where great adjacent channel interference may be present is when two co-located communication systems are operating in two adjacent frequency bands, for instance where LTE and WiFi functionality are integrated in the same device. In such a case, the interfering signal from WiFi to LTE (or vice versa) may be a 100 dB stronger than the desired signal at the device antenna. Although there is a band-selective filter (B SF) intended to filter out-of-band signals prior to the device receiver, the ACI may only be attenuated by some 40 dB. This implies that the interfering signal entering the receiver may be 60 dB stronger than the desired in-band signal. Now, as this would put far too demanding requirements on the ADC, a low-pass filter is typically implemented prior to the ADC in order to mitigate the requirements on the dynamic range of the ADC. However, this will in practice typically not be enough to cancel the ACI. Now, since a digital receiver system unavoidably must handle the remaining ACI, an AGC is employed for controlling the amplitude of the signal which is input to the ADC.
To conclude, in prior art control schemes, it has been advocated that the signal controlled by the AGC ideally should have an amplitude which exactly fits the full scale voltage range of the ADC. Or in other words, the signal which is controlled by the AGC—i.e. the signal which is input to the ADC—should optimally have an amplitude that exactly fits the allowed input range of the ADC, in order to best make use of the ADC dynamic range. If the amplitude of the signal input to the ADC is any higher, the ADC will saturate and ultimately produce a defective digitized output signal (signal saturation/clipping will additionally have further deteriorating and non-linear effects on the system which are difficult to value beforehand). On the other hand, if the amplitude of the signal input to the ADC is much lower than the ADC input range, there is a risk that the signal is overly affected by quantization noise. This is particularly problematic in the presence of strong adjacent channel interfering signals, in which case the desired signal will occupy a relatively small portion of the total ADC input voltage range.
As was mentioned, in the art, the AGC is configured such that clipping in the ADC is avoided, implying that a great safety margin must be used for the amplified signal with respect to allowed ADC input voltage range. In the presence of strong interfering signals, substantial quantization noise is caused for the desired signal since a large portion of the ADC full scale voltage range is used for quantizing the interfering signal. The quantization noise for the desired signal can of course be decreased by using an ADC with greater resolution; the quantization noise will decrease with an increased number of bits in the ADC. However, this is not a feasible solution as the system cost and power consumption increase as the number of bits employed by the ADC increases. As a rough estimate, the power consumption of an ADC doubles as the number of quantization levels is increased by a factor of two.